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INTEGRATED CIRCUITS
DATA SHEET
74HC1G125; 74HCT1G125 Bus buffer/line driver; 3-state
Product specification File under Integrated Circuits, IC06 1998 Nov 10
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
FEATURES * Wide operating voltage: 2.0 to 6.0 V * Symmetrical output impedance * High noise immunity * Low power dissipation * Balanced propagation delays * Very small 5 pins package * Output capability: bus driver. Notes DESCRIPTION The 74HC1G/HCT1G125 is a high-speed Si-gate CMOS device. The 74HC1G/HCT1G125 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH at OE causes the output as assume a high-impedance OFF-state. The bus driver output currents are equal compared to the 74HC/HCT125. FUNCTION TABLE See note 1. INPUTS OE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF state. inA L H X OUTPUT outY L H Z
74HC1G125; 74HCT1G125
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 6.0 ns. TYP. SYMBOL tPHL/tPLH CI CPD PARAMETER propagation delay inA to outY input capacitance power dissipation capacitance notes 1 and 2 CONDITIONS HC1G CL = 15 pF; VCC = 5 V 9 1.5 30 HCT1G 10 1.5 27 ns pF pF UNIT
1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; (CL x VCC2 x fo) = sum of outputs. 2. For HC1G the condition is VI = GND to VCC. For HCT1G the condition is VI = GND to VCC - 1.5 V. PINNING PIN 1 2 3 4 5 OE inA GND outY VCC SYMBOL DESCRIPTION output enable input data input ground (0 V) data output DC supply voltage
1998 Nov 10
2
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
ORDERING INFORMATION
74HC1G125; 74HCT1G125
PACKAGES OUTSIDE NORTH AMERICA 74HC1G125GW 74HCT1G125GW TEMPERATURE RANGE -40 to +125 C PINS 5 5 PACKAGE SC-88A SC-88A MATERIAL plastic plastic CODE SOT353 SOT353 MARKING HM TM
handbook, halfpage
handbook, halfpage
OE 1 inA 2 GND 3
MNA117
5 VCC
2
inA
outY
4
125
4 outY
1
OE
MNA118
Fig.1 Pin configuration.
Fig.2 Logic symbol.
handbook, halfpage
2 4 1 OE
MNA119
handbook, halfpage
inA
outY
OE
MNA120
Fig.3 IEC logic symbol.
Fig.4 Logic diagram.
1998 Nov 10
3
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
RECOMMENDED OPERATING CONDITIONS 74HC1G04 SYMBOL VCC VI VO Tamb PARAMETER MIN. DC supply voltage input voltage output voltage operating ambient temperature input rise and fall times except for Schmitt trigger inputs 2.0 0 0 -40 TYP. 5.0 - - +25 MAX. 6.0 VCC VCC +125 MIN. 4.5 0 0 -40
74HC1G125; 74HCT1G125
74HCT1G04 UNIT TYP. 5.0 - - +25 MAX. 5.5 VCC VCC +125 V V V C see DC and AC characteristics per device VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V CONDITIONS
tr, tf
- - -
- - -
1000 500 400
- - -
- - -
- 500 -
ns ns ns
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK IOK IO ICC Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 55 C the value of PD derates linearly with 2.5 mW/K. PARAMETER DC supply voltage DC input diode current DC output diode current DC output source or sink current standard outputs DC VCC or GND current for types with standard outputs storage temperature power dissipation per package VI < -0.5 V or VI > VCC + 0.5 V; note 1 VO < -0.5V or VO > VCC + 0.5 V; note 1 -0.5V < VO < VCC + 0.5 V; note 1 note 1 CONDITIONS - - - - -65 temperature range: -40 to +125 C; note 2 - MIN. -0.5 MAX. +7.0 20 20 12.5 25 +150 200 UNIT V mA mA mA mA C mW
1998 Nov 10
4
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
DC CHARACTERISTICS
74HC1G125; 74HCT1G125
Family 74HC1G Additional type data to the recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb (C) SYMBOL PARAMETER MIN. VIH HIGH-level input voltage 1.5 3.15 4.2 VIL LOW-level input voltage - - - VOH HIGH-level output voltage; all outputs 1.9 4.4 5.9 VOH HIGH-level output voltage; standard outputs LOW-level output voltage; all outputs 4.13 5.63 - - - VOL LOW-level output voltage; standard outputs input leakage current quiescent supply current - - - - -40 to +85 TYP.(1) 1.2 2.4 3.2 0.8 2.1 2.8 2.0 4.5 6.0 4.32 5.81 0 0 0 0.15 0.16 - - MAX. - - - 0.5 1.35 1.8 - - - - - 0.1 0.1 0.1 0.33 0.33 1.0 10 -40 to +125 MIN. 1.5 3.15 4.2 - - - 1.9 4.4 5.9 3.7 5.2 - - - - - - - MAX. - - - 0.5 1.35 1.8 - - - - - 0.1 0.1 0.1 0.4 0.4 1.0 20 A A V V V V V V UNIT VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 VI = VIH or VIL; IO = 2.0 mA VI = VIH or VIL; IO = 2.6 mA VI = VCC or GND VI = VCC or GND; IO = 0 VI = VIH or VIL; -IO = 2.0 mA VI = VIH or VIL; -IO = 2.6 mA VI = VIH or VIL; IO = 20 A VI = VIH or VIL: -IO = 20 A OTHER TEST CONDITIONS
VOL
II ICC Note
1. All typical values are measured at Tamb = 25 C.
1998 Nov 10
5
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74HC1G125; 74HCT1G125
Family 74HCT1G Additional type data to the recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb (C) SYMBOL PARAMETER MIN. VIH VIL VOH VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage; all outputs HIGH-level output voltage; standard outputs LOW-level output voltage; all outputs LOW-level output voltage; standard outputs quiescent supply current additional supply current per input 2.0 - 4.4 4.13 -40 to +85 TYP.(1) 1.6 1.2 4.5 4.32 MAX. - 0.8 - - -40 to +125 MIN. 2.0 - 4.4 3.7 MAX. - 0.8 - - V V V V UNIT VCC (V) 4.5 to 5.5 4.5 to 5.5 4.5 4.5 VI = VIH or VIL; -IO = 20 A VI = VIH or VIL; -IO = 2.0 mA VI = VIH or VIL; IO = 20 A VI = VIH or VIL; IO = 2.0 mA VI = VCC or GND VI = VCC or GND; IO = 0 VI = VCC - 2.1; IO = 0 OTHER TEST CONDITIONS
VOL VOL
- -
0 0.15
0.1 0.33
- -
0.1 0.4
V V
4.5 4.5
II ICC ICC Note
input leakage current - - -
- - -
1.0 10.0 500
- - -
1.0 20 850
A A A
5.5 5.5 4.5 to 5.5
1. All typical values are measured at Tamb = 25 C.
1998 Nov 10
6
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
AC CHARACTERISTICS Type 74HC1G125 GND = 0 V; tr = tf 6.0 ns; CL = 50 pF. Tamb (C) SYMBOL PARAMETER - - - tPZH/tPZL 3-state output enable time OE to outY 3-state output disable time OE to outY - - - - - - -40 to +85 MIN. TYP.(1) tPHL/tPLH propagation delay inA to outY 24 10 8 19 9 7 18 12 11 MAX. 125 25 21 155 31 26 155 31 26 - - - - - - - - -
74HC1G125; 74HCT1G125
TEST CONDITIONS -40 to +125 MIN. MAX. 150 30 26 190 38 32 190 38 32 ns ns ns ns ns ns ns ns ns UNIT VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 see Figs 6 and 7 see Figs 6 and 7 WAVEFORMS see Figs 5 and 7
tPHZ/tPLZ
Note 1. All typical values are measured at Tamb = 25 C. Type 74HCT1G125 GND = 0 V; tr = tf 6.0 ns; CL = 50 pF. Tamb (C) SYMBOL PARAMETER MIN. tPHL/tPLH tPZH/tPZL propagation delay inA to outY 3-state output enable time OE to outY 3-state output disable time OE to outY - - -40 to +85 TYP.(1) 11 10 MAX. 30 35 -40 to +125 MIN. - - MAX. 36 42 ns ns UNIT VCC (V) 4.5 4.5 WAVEFORMS see Figs 5 and 7 see Figs 6 and 7 TEST CONDITIONS
tPHZ/tPLZ
-
11
31
-
38
ns
4.5
see Figs 6 and 7
Note 1. All typical values are measured at Tamb = 25 C.
1998 Nov 10
7
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
AC WAVEFORMS
74HC1G125; 74HCT1G125
handbook, halfpage
VI VM(1)
inA INPUT GND
tPHL
tPLH
outY OUTPUT
VM(1)
MNA121
(1) HC1G VM = 50%; VI = GND to VCC; HCT1G VM = 1.3 V; VI = GND to 3.0 V.
Fig.5
The input (inA) to output (outY) propagation delays.
handbook, full pagewidth
VI OE INPUT GND tPLZ VCC OUTPUT LOW-to-OFF OFF-to-LOW tPHZ OUTPUT HIGH-to-OFF OFF-to-HIGH GND output enabled output disabled output enabled
MNA122
VM(1)
tPZL
VM(1) VOL +0.3 V tPZH VOH -0.3 V VM(1)
(1) HC1G VM = 50%; VI = GND to VCC; HCT1G VM = 1.3 V; VI = GND to 3.0 V.
Fig.6 The 3-state enable and disable times.
1998 Nov 10
8
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74HC1G125; 74HCT1G125
handbook, halfpage
VCC VI D.U.T. RT CL 50 pF
MNA123
PULSE GENERATOR
VO
RL = 1 k S1
VCC open
Definitions for test circuit; CL = load capacitance including jig and probe capacitance. (See "AC characteristics") RT = termination resistance should be equal to the output impedance Zo of the pulse generator. RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH open VCC GND
S1
Fig.7 Load circuitry for switching times.
1998 Nov 10
9
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
PACKAGE OUTLINE Plastic surface mounted package; 5 leads
74HC1G125; 74HCT1G125
SOT353
D
B
E
A
X
y
HE
vMA
5
4
Q
A
A1
1
e1 e
2
bp
3
wM B detail X Lp
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E (2) 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT353
REFERENCES IEC JEDEC EIAJ SC-88A
EUROPEAN PROJECTION
ISSUE DATE 97-02-28
1998 Nov 10
10
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted IC's, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering IC's can be found in our "Data Handbook IC26; Integrated Circuit Packages" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C.
74HC1G125; 74HCT1G125
Wave soldering Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1998 Nov 10
11
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
74HC1G125; 74HCT1G125
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1998 Nov 10
12
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
NOTES
74HC1G125; 74HCT1G125
1998 Nov 10
13
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
NOTES
74HC1G125; 74HCT1G125
1998 Nov 10
14
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
NOTES
74HC1G125; 74HCT1G125
1998 Nov 10
15
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
245106/00/01/pp16
Date of release: 1998 Nov 10
Document order number:
9397 750 03693

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